WRT54G
Transceiver from GL causes dropped characters; using Linksys transceiver
- possibly solved by "tighter" transceiver construction
loading CFE
VxWorks will flash over itself with CFE - http://wiki.openwrt.org/OpenWrtDocs/Hardware/Linksys/WRT54G
Attempted to load micro openWRT kernel and CFE over VxWorks
- upload failed - incompatible browser?
- despite successful re-load of original firmware, bootloader refuses to find image on flash
- possible solutions are loading fresh VxWorks from network or reloading flash through EJTAG port
loading XINU
Control-C interrupts VxWorks loader, as it does in CFE. VxWorks has an advantage over CFE in that it will remember bootloader settings for tftp host after powercycle. This removes the need for special xinu-console script to talk to CFE. Just run xinu-console, download compiled boot image, and powercycle.
Settings for VxWorks bootloader:
- boot device: vl0
- host name: morbius
- file name: {backend name}.boot
- inet on ethernet: 192.168.6.{assigned by morbius}
- host inet: 192.168.6.10
- flags 0x88 --tftp and quickboot
Changes to current XINU revision for 'G' compatibility:
- loader/start.S
- change max physical address from 0x81000000 to 0x80800000 (cut in half)
- removal of cfe_api.c from loader, remove references in start.S
- replaced CFE cache flushing with fresh cache initialization function
- altered mips.h for macros in loader cache init function
- system/xdone.c - remove CFE_exit(), add new halt() function
- uart/uartInit.c
- remove ucptr->uart_dll = 0x0B;
- remove ucptr->uart_dlm = 0x00;
- If one queries the hardware, values to replace 0B and 00 can be identified, 0E and 00
- devtable.c (NOT NEEDED)
- remove entries for SERIAL1 and TTY1
- I further changed the CONSOLE to be device 1, rather than 2
- device.h (NOT NEEDED)
- remove lines for #define SERIAL1 and TTY1
- define CONSOLE and TTY0 as 1, rather than 2
- change #define NUART and NTTY from 2 to 1
Loader now reads CPU revision number from CP0 PRId register. This automatically sets max physical address and UART baud rate divisor based on model.
