EJTAG

EJTAG is a MIPS-specific extension of IEEE 1149.1, the Joint Test Action Group. Allows interfacing with additional logic in SoC

direct control of processor for step-by-step debugging
access to busses and registers
- aids in debugging
- possible usage as additional peripheral data bus
- direct writing to flash for firmware updates (and de-bricking)

Debugging

Attempting to use GNU debugger: http://www.gnu.org/software/gdb. GDP uses its own Remote Serial Protocol (RDB) to communicate to remote targets. This protocol could be used to communicate with the XINU backends through the current serial connection. Although, this would require additions]] to XINU: communication with the GDB host; altering of exception handler to allow GDB to take control of target processor.

The use of the EJTAG port on the WRT54-series routers gives the user hardware control of the processor, avoiding the need for strategically placed breakpoints and XINU interrupt subsystem modification. Additionally, requests by the debugger for specicfic data can be aquired directly from registers. The trick to this operation is software that can interpret commands from RDB into EJTAG signals to be sent through the host parallel port, and vice-versa. An implementation of this interpreter can be found at http://www.totalembedded.com/open_source/jtag/mips32_ejtag.php.

Note that the unbuffered cable at the bottom of this page is only proven functional in writing to the Test Access Port. It may not read data back from the target device.